Building a chip is like building a city....
Building a chip is like building a city...
This was the mantra with which we started our company in 2011. Now that we have covered major components of chip designing through our online courses, I think this is the right time to move from "chip designing" to "chip planning"
Chip Planning involves lot of decision making like, analog peripheral (ADC, DAC, POR, etc.), digital peripheral (UART, flash controller), memory mapping, top level connections like pad-frame, level-shifters, GPIO and many more.
Do you want to know what it is like to build a city? Did you know there is no standard definition for GPIOs? Thats the whole point of designing an SOC. Figuring out what things you are going to control outside of the CPU and memory mapping them.
If you look at any microcontroller e.g. PIC microcontroller, the only way to know how you access their ADC or their UART is to go look at their documentation and find out wheres the memory map address for this
Do you want to know how to build and configure your own System-on-Chip (SoC)? Do you want to write your own data sheet?
I welcome you to my webinar which was conducted on Mar 10, 2018. Enroll with myself, Tim Edwards and Mohamed Kassem, and rise above, by being a Core SoC designer and build your own datasheet.
This is the perfect webinar for to grow and stay ahead of curve in Semiconductor and Chip design. Stay tuned and happy learning....
All the best, and I will see you in webinar..
Students will be able to build and configure their own SoC (System-On Chip)
Students will be able to create their own defition of GPIO
Understand decision making process, analog peripheral (ADC, DAC), digital peripheral (UART, flash controller), memory mapping, pad-frame, level-shifters, GPIO
3 Lectures
3 Lectures
3 Lectures
4 Lectures
4 Lectures
4 Lectures
4 Lectures
3 Lectures
Tips on order in which you need to learn VLSI and become a CHAMPION:If I would had been you, I would had started with Physical Design and Physical design webinar course where I understand the entire flow first, then would have moved to CTS-1 and CTS-2 to look into details of how the clock is been built.Then, as you all...
Tim Edwards has been designing analog VLSI circuits and systems and developing open-source EDA tools for many years, from the Space Department at the Johns Hopkins Applied Physics Lab (1999-2003) to the startup company MultiGiG (bought by Analog Devices) (2004-2015), to his current job at efabless dot com (2016-present).  He operates the website opencircuitdesign dot com.
should have told it's a webinar made course.
not meant for a udemy user,but for the students who attended the webinar
It's a recording of a wedinare
The playback, video quality, and webinar content are good. but i had to slow down the playback speed to 5x to understand the host. and use captions. Still I think the content is pretty spot on. So, thats why I chose 4/5
pretty good. level of detail perfect for me. Filling in some gaps in my knowledge.
The presenter is going pretty fast thru the presentation while the course is based on outdated efabless website design which required a lot of poking around until I get it right. Anyways, quite amazing.
The modules are bit older and the interfaces in efabless has got changed and different from what is explained here
very fast teaching
courses are very basic
Thank you for the course
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Rafael A.
Didatic and informative