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VLSI - Essential concepts and detailed interview guide

Master VLSI System Design with our micro-video course. Enhance your industrial skills from device physics to chip design for interviews and practical applications.

4.9

315,475 rating
11 Lessons
229 Students
Last updated 4 months ago

By Kunal Ghosh

via Udemy

Go To Course

Brief Summary

This VLSI Academy course is all about getting the basic vibes of VLSI System Design through fun micro-videos and cool graphics. It’s perfect for a quick rundown to prep for those tricky interviews while also giving you a peek into Device Physics and chip design!

Key Points

Basic concepts of VLSI System Design
Micro-videos and Info-Graphics for easy learning
Focus on Device Physics and MOS Transistor characteristics
Covers topics briefly for quick revisions
Designed to enhance industrial skills for interviews

Learning Outcomes

Understand the basic elements of VLSI System Design
Familiarize with MOS Transistor fundamentals
Revise key topics quickly for interview readiness
Enhance practical skills relevant to the industry
Bridge the gap between understanding and real-world application

About This Course

VLSI Academy

This course is about Basic concepts of VLSI System Design. The course is designed in the form of micro-videos, which delivers content in the form of Info-Graphics. It is designed for self-learning and will help to polish the Industrial skills in VLSI World. This course will cover end-to-end description from basic Device Physics to Chip Design.The introductory video series focuses on the basic elemental physics and electrical characteristics of MOS Transistor.

This course covers most topics in brief and not in detail, just to revise topics below interviews. For detailed and thorough discussion of each topic, you need to go to individual courses.

All the best for your interviews and happy learning

To bridge the gap between Understanding and Application of Knowledge, this leads to innovation

Course Curriculum

Physical Design Flow Overview

4 Lectures

Floor-Planning Steps

Netlist Binding And Placement Optimization

Clock Net Shielding

Route - DRC Clean - Parasitics Extraction - Final STA

Floorplanning

4 Lectures

Utilization Factor And Aspect Ratio

Concept of Pre-placed Cells

Power Planning

Pin Placement And Logical Cell Placement Blockage

Placement

3 Lectures

Netlist Binding And Placement

Optimize Placement Using Estimated Wire Length And Capacitance

Optimize Placement Continued

Timing Analysis With Ideal Clocks

4 Lectures

Setup Time Analysis And Introduction To Flip-Flop Setup Time

Setup Timing Analysis With Multiple Clocks

Multiple Clock Timing Analysis And Introduction To Data Slew Check

Data Slew Check

Clock Tree Synthesis - Introduction And Quality Check Parameters

5 Lectures

Introduction To Clock Tree Synthesis

Duty Cycle And Latency Check

Latency And Power Check

Power And Crosstalk Quality Check

Glitch Quality Check

H-Tree

3 Lectures

H-Tree Algorithm And Skew Check

H-Tree Pulse Width And Duty Cycle Check

H-Tree Latency And Power Check

Clock Tree Modelling and Observations

3 Lectures

Clock Tree Modelling

Clock Tree Building

Clock Tree Observations

Buffered H-Tree

5 Lectures

H-Tree Buffering Observations

H-Tree Pulse Width Check And Issues With Regular Buffers

CMOS Inverter PMOS/NMOS Matching Switching Resistance Solution

H-Tree Clock Buffers And Pulse Width Check

Dynamic Power And Short Circuit Power

Clock Tree Optimization Checklist

3 Lectures

Optimization Checklist

Leakage Current Reduction Technique

Optimized Clock Tree Power And Latency Check

Static Timing Analysis With Real Clocks

3 Lectures

Static Timing Analysis With Real Clocks

Impact Of Unbalanced Skew On Setup Time

Impact Of Unbalanced Skew On Hold Time

Introduction To Crosstalk - Why and How Crosstalk occurs in a CHIP ??

4 Lectures

Introduction

Dominant Lateral Capacitance

Noise Margin Voltage Parameters

Lower Supply Voltage

Glitch Examples And Factors Affecting Glitch Height

4 Lectures

Basic Crosstalk Glitch Example

Glitch Discharge With High Drive Strength PMOS Transistor

Factors Affecting Glitch Height - Aggressor Drive Strength

Factors Affecting Glitch Height - Conclusion

Tolerable Glitch Heights and Introduction to AC Noise Margin

4 Lectures

Impacts Of Glitch

Tolerable Glitch Heights Using DC Noise Margin

AC Noise Margin

Justification Of Load Impact And Conclusion

Crosstalk Delta Delay Analysis

4 Lectures

Crosstalk Delta Delay - Aggressor Victim Switching in Opposite Direction

Setup Timing Analysis Using Real Clocks

Crosstalk Delta Delay - Aggressor Victim Switching In Same Direction

Impact Of Crosstalk Delta Delay On Hold Timing

Noise Protection Technique

3 Lectures

Shielding

Spacing

Drive Strength

Routing And Design Rule Check (DRC)

2 Lectures

Introduction To Maze Routing - Lee's Algorithm

Design Rule Check

Parasitics Extraction

2 Lectures

Introduction To IEEE 1481-1999 SPEF Format

SPEF Header Description, Physical Design Flow Conclusion And What Next !!

GENERATED CLOCKS DEFINITION AND CREATION

4 Lectures

DEFINE GENERATED CLOCK FOR DIVIDE-BY-2 CIRCUIT

GENERATED CLOCKS USING MASTER CLOCK EDGES

GENERATED CLOCK WAVEFORM DERIVATION

GENERATED CLOCK WITH SHIFTED EDGE

BASICS OF MOS TRANSISTOR

4 Lectures

INTRODUCTION TO VLSI ACADEMY

GATE VOLTAGE AND ACCUMULATION OF NEGATIVE CHARGE

N-CHANNEL FORMATION BETWEEN SOURCE AND DRAIN

IMPACT OF SUBSTRATE POTENTIAL ON THRESHOLD VOLTAGE (VT)

SETUP & HOLD TIMING ANALYSIS

4 Lectures

INITIAL TIMING ANALYSIS AND INTRODUCTION TO FLOP SETUP TIME

SETUP TIMING ANALYSIS WITH JITTER AND REAL CLOCKS

INTRODUCTION TO SLACK AND HOLD TIMING ANALYSIS

HOLD TIMING ANALYSIS CONCLUDED

Instructor

Kunal Ghosh

4.9

315,475 Reviews
345 Students
34 Course

Tips on order in which you need to learn VLSI and become a CHAMPION:If I would had been you, I would had started with Physical Design and Physical design webinar course where I understand the entire flow first, then would have moved to CTS-1 and CTS-2 to look into details of how the clock is been built.Then, as you all...

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Review

4.9 course rating

4K ratings

Ditsa D.

4.5

11 months ago

nice

Helpful
Not helpful

Abhishek K.

3.0

11 months ago

There were some missing videos

Helpful
Not helpful

Nisha

3.0

1 year ago

incomplete concepts and some parts are skipped and moved to next part of the lecture.

Helpful
Not helpful

Bharath

4.5

1 year ago

this was good

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Not helpful

Ramya

2.0

1 year ago

He has already explained it in physical design course, then why the same thing is being repeated again in interview guide course..
i thought he wll go in detail, but he has just covered the basics which is disappointing

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Anindya B.

5.0

1 year ago

A wonderful course.It could have been much better with some more mathematical insights.

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Not helpful

Sagar M. S.

1.0

1 year ago

This course is not in sequence. There are many topics which the instructor has claimed to cover but has not done the needful. CTS quality checks(lec 16) Skew and pulsewidth is not covered.
No link between the following lectures:
28 to 29
30 to 31
31 to 32
and this goes on.
Litreally the worst course I've ever taken on udemy

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Rani N.

3.0

2 years ago

It's good and there are helpful material indeed. But there are way too much repeating on the same concept again and again.

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Not helpful

Tomer S.

2.0

2 years ago

Not so clear + the over explaining makes the course feel slow.

Helpful
Not helpful

Ajay S. I.

4.5

3 years ago

I'm very happy with this course.

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Not helpful

Ratings

This course includes:

54.5 hours on-demand video
3 articles
249 downloadable resources
Access on mobile and TV
Full lifetime access
Certificate of completion

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VLSI - Essential concepts and detailed interview guide

Brief Summary

Key Points

Learning Outcomes

About This Course

Course Curriculum